Intel’s already-rough process technology ramp took another hit last week. According to Mark Li, an electronics engineer and analyst with Bernstein, the company will delay its introduction of Extreme Ultraviolet Lithography (EUV) until 2021. That’s several years after rivals TSMC and Samsung are expected to have the technology in play — maybe.
The problem is related, at least in part, to the general delays that have hit Intel’s 10nm line. Because it takes years to fit a foundry for a new process node and to bring new tools online, these companies make plans for the specific characteristics of each node years in advance. It’s not impossible to retrofit a node with new technology, but it’s both expensive and time-consuming. Since process node advances are typically tied to the introduction of new technologies and refined manufacturing techniques as opposed to any single physical metric of semiconductor feature size, it makes both business and marketing sense to align the introduction of new technologies with the introduction of new nodes. This is particularly true for EUV, which requires very different manufacturing conditions and tolerances compared with standard 193nm ArF lithography.
We first reported on rumors that Intel’s 10nm would be delayed back in 2015. Imagine if the company had hit its original target and begun launching EUV in 2016. With Tick-Tock still ticking along, 7nm would’ve arrived in 2018 – 2019 (bearing in mind that Intel’s process nodes have tended to hit more aggressive targets that map to smaller nodes at rival foundries). If Intel could’ve kept to this timeline, 7nm and EUV would’ve arrived synonymously for it, the same way they have (more or less) for Samsung and TSMC. But Intel’s timeline did slip — and with its 10nm node introduction pushed back to holidays 2019, the company won’t be able to introduce EUV until the 7nm node, currently planned for 2021.
The reason there’s a “maybe” attached to all of this is that EUV is the original “real soon now” technology. The first papers proposing soft x-ray imaging were published in 1988. The first national program for the development of EUV began in 1995 – 1996. Intel’s first roadmap slide, published in 2000, called for the introduction of EUV in manufacturing by 2004 or sooner. Fourteen years later, we’re still waiting for the manufacturing tools to catch up with the capabilities the semiconductor industry needs them to deliver.
The major foundries (including GlobalFoundries, until last week), have been talking a big game about EUV introduction for years now. TSMC’s first 7nm node doesn’t use it, but a later variant, 7FF+, will. Samsung is holding its own 7nm introduction until EUV is ready and claiming it will introduce the technology in the first half of 2019. Anandtech covered some of these announcements by TSMC earlier this year. First, look at the size of the improvement the company promises to customers who might prefer its 7FF+ (EUV) as compared with 7FF (no EUV):
The improvements promised by 7FF+ over 7FF are tiny. The company hasn’t even provided an estimate for improved performance, beyond “higher.” One reason for this is that EUV is primarily expected to reduce error rates, lower manufacturing times, and otherwise improve the cost structure of the foundry business, as opposed to yielding significant performance improvements. In fact, it’s possible that TSMC is planning to deliver incremental improvements to the node to hit these performance and power targets over and beyond EUV. Alternately, it’s possible these are the benefits that introducing EUV in non-critical layers can be expected to provide. But a few paragraphs later in the story, there’s this:
TSMC admits that at present the average daily power levels of the light sources for their EUV tools is only at 145 W, not enough for commercial usage. Some of the tools can sustain 250 W production for a couple of weeks and TSMC has plans to hit 300 W later this year, but EUV tools still need improvements. There are also some issues to be solved with things like pellicles (they transmit 83% of EUV light and are expected to hit 90% next year), so EUV lithography in general is not ready for prime time just now, but is on track for 2019 – 2020.
Machines with 200W source power were originally projected for a 2009 delivery. Nine years later, we still don’t have them. There was a time (2011) when companies were predicting the delivery of 500W sources by mid-2013. All of these details and public presentations are available in an EUV presentation compiled by lithography guru Dr. Christopher Mack back in 2015. In 2013, the 250W promised land was going to be reached in 2015. In 2018, we’re supposedly a year away.
Is it possible that TSMC and Samsung have finally cleared the roadblocks and that the path to a useful pellicle and EUV manufacturing solution is just 4-6 months from finished? Sure. But read a tiny bit between the lines, here. These companies are emphasizing that their plans for EUV are to introduce it gradually and in non-critical areas first. They’re hedging bets. Many of the announcements around EUV production to date have been heavily qualified. When ASML announced it had hit its throughput specification of 125 wafers per hour in a TWINSCAN NXB:3400 last year, it didn’t announce that it had actually manufactured anything using the equipment in question.
What all this likely means is that the introduction of EUV will either be further delayed as companies struggle towards 250W source power in practical manufacturing, along with an appropriate pellicle solution, or that the technology will ramp only gradually and over several years. Based on how slow and uncertain the technology’s ramp has been to date, it’s entirely possible that TSMC and Samsung will spend several years adapting it for use in different parts of the manufacturing process.
Intel, meanwhile, will be doing the same thing. Remember what we said in the beginning — foundries are always looking ahead to the next technology node and planning to introduce capabilities for it. Granted, Intel’s overwhelming focus is going to be on getting its 10nm production completed and out the door right now, but the company has been pursuing EUV for decades. It may not be the first to ship SoCs that use the technology, but that doesn’t mean Intel can’t keep ramping EUV for insertion at its future 7nm node while simultaneously working to get its more conventional 10nm process out the door.
The optics of this kind of delay aren’t great, but I’d still counsel caution before concluding that this EUV news is additional proof of Intel’s loss of overall process technology leadership. Every foundry committed to building leading-edge products is working on EUV, but nobody — nobody — has yet demonstrated that they can build and ship SoCs in volume while using EUV for critical layers. This step may not happen until the introduction of 5nm; Scotten Jones, president of IC Knowledge LLC, notes that he expects solutions to be in place for contacts and vias at 7nm, but that the timeline for hitting foundry targets for 5nm is very tight and requires new pellicles.
Intel’s EUV delay isn’t a new wrinkle. It’s an unsurprising result of the company’s decision to delay 10nm. The degree to which this could impact the company’s future product development will depend a great deal on how successful the other foundries are in shipping EUV from their own factories. Despite the hype around the technology, don’t expect to see it making an immediate or dramatic difference in anyone’s product performance in the near future. That’s not what EUV delivers is expected to deliver, and the gains are going to roll out gradually over multiple nodes as manufacturers insert the technology.
Now Read: GlobalFoundries Departing the Leading Edge is an Ominous Sign for Foundry Industry, Intel at a Crossroads, and EUV Integration at 5nm Still Risky, With Major Problems to Solve